DFT Engineer – Python / DFT /RTL
Opportunity to Join a global semiconducting organization that is a leading provider of high-speed, energy-efficient chip-to-chip link solutions are looking for a DFT Engineer Design Engineer to join their team in Germany or Switzerland on a permanent basis. If This is, you please continue reading below!
Responsibilities
-
Understanding of ATE, Wafer bring up debug issues and drive the test engineering team for successful Silicon bring up and test program development
-
Defining the test plan by closely working with the team and developing functional/structural tests for final/wafer test program development
-
Work with the team in defining HTOL test suite/cycle times/bring up on burn-in PCB boards
-
Knowledge of lab bench Silicon debug, Characterization
Requirements
-
5+ years of DFT experience including architecture specification, implementation, test pattern development, and verification
-
Experience with MBIST insertion, simulation, and verification on RTL and Gate Level Netlist
-
Experience with Scan insertion, Scan compression, Stuck-At, At-Speed test, and coverage analysis
-
Scan ATPG pattern generation, simulation, and debug on RTL and Gate Level Netlist
-
STA DFT Test mode timing constraint development and analysis
-
TCL scripting; Python scripting is a plus
Keywords
Python / DFT / RTL
Apply via LinkedIn, or send your CV to [email protected]
By applying to this role, you understand that we may collect your personal data, store and process it on our systems. For more information, please see our Privacy Notice (Privacy Notice)